Espressif Systems /ESP32-P4 /MIPI_CSI_BRIDGE /INT_ENA

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Interpret as INT_ENA

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VADR_NUM_GT_INT_ENA)VADR_NUM_GT_INT_ENA 0 (VADR_NUM_LT_INT_ENA)VADR_NUM_LT_INT_ENA 0 (DISCARD_INT_ENA)DISCARD_INT_ENA 0 (CSI_BUF_OVERRUN_INT_ENA)CSI_BUF_OVERRUN_INT_ENA 0 (CSI_ASYNC_FIFO_OVF_INT_ENA)CSI_ASYNC_FIFO_OVF_INT_ENA 0 (DMA_CFG_HAS_UPDATED_INT_ENA)DMA_CFG_HAS_UPDATED_INT_ENA

Description

csi bridge interrupt enable.

Fields

VADR_NUM_GT_INT_ENA

reg_vadr_num is greater than real interrupt enable.

VADR_NUM_LT_INT_ENA

reg_vadr_num is less than real interrupt enable.

DISCARD_INT_ENA

an incomplete frame of data was sent interrupt enable.

CSI_BUF_OVERRUN_INT_ENA

buffer overrun interrupt enable.

CSI_ASYNC_FIFO_OVF_INT_ENA

buffer overflow interrupt enable.

DMA_CFG_HAS_UPDATED_INT_ENA

dma configuration update complete interrupt enable.

Links

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